A.5 Debug signals

The inputs can change at runtime and you must synchronize them to the CCI-550 clock to prevent timing hazards.

The following table shows the debug signals.

Table A-5 Debug signals

Signal
Direction
Description
NIDEN
Input
Non-invasive debug enable. If HIGH, the signal enables counting and export of PMU events.
SPNIDEN
Input
Secure privileged non-invasive debug enable. When HIGH, this signal enables the counting of both Non-secure and Secure events, provided NIDEN is HIGH also.
DBGEN
Input
Invasive debug enable. If HIGH, enables the counting and export of PMU events.
SPIDEN
Input
Secure privileged invasive debug enable. When HIGH, this signal enables the counting of both Non-secure and Secure events, provided DBGEN is HIGH also.
EVNTBUS[n:0]
Output
The CCI-550 events that are exported if event export functionality is enabled in the PMCR. See PMU event list for information on pin allocations of this vector.
The vector width depends on the number of master interfaces, M, and the number of slave interfaces, S, and is defined as:
S*32 + M*7 + 15.
nEVNTCNTOVERFLOW[7:0]
Output
Overflow flags for the PMU clock and counters. This is an active-LOW signal. Each bit represents the overflow for the event counter with that number.
nERRIRQ
Output
Indicates that an error response, DECERR or SLVERR, is received on the RRESP, BRESP, or CRRESP input signals, and it cannot be signaled precisely. If LOW, the signal indicates that an error has occurred.
See the ARM® CoreSight™ Architecture Specification for more information.
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