2.1.3 DTI interconnect
The TBU and TCUs use a DTI interface to communicate. The DTI interconnect enables the DTI interface to use the AXI4‑Stream transport protocol.
The DTI interconnect can connect any components that conform to the
AXI4‑Stream protocol, as defined by the Arm®
Distributed Translation Interface (DTI) Protocol Specification.
The DTI interconnect contains internal components that are hierarchically
composable, that is, they can be connected in different ways to suit your system
requirements. For example, within an MMU-600 system, you can use the switch component to combine the DTI
interfaces of multiple TBUs into a single DTI interface. You can then connect the
combined DTI interface to another DTI interconnect that is closer to the TCU. The DTI
interconnect includes switch, sizer, and register slice components.
- The switch connects multiple DTI masters, such as TBUs, to a DTI slave such
as a TCU. The switch implements the following parallel networks:
- For TBU to TCU traffic, a network that connects
multiple AXI4‑Stream slave interfaces to a single
AXI4‑Stream master interface.
- For TCU to TBU traffic, a network that connects a
single AXI4‑Stream slave interface to multiple
AXI4‑Stream master interfaces.
Note: The switch does not store any data, and therefore
does not require a Q‑Channel clock‑gating
- The sizer connects channels that have different data widths, enabling
different tradeoffs of bandwidth to area. The sizer supports conversion between
any of the supported AXI4‑Stream data widths:
- 1 byte.
- 4 bytes.
- 10 bytes.
- 20 bytes.
- The sizer includes a Q‑Channel interface to provide
- Register slice
- Use the register slice to improve timing. The register slice includes a
Q‑Channel interface to provide clock‑gating
- The MMU-600 DTI interconnect components do not
include a component to connect different clock and power domains. You can
connect DTI interfaces in different clock and power domains by using the
Bidirectional AXI4-Stream (BAS) configuration of the ADB-400