B.1.6 Invalidating TLBs and configuration caches

Before use, the MMU-600 TLBs and configuration cache structures must be invalidated by issuing commands to the Command queue. Alternatively, Secure software can invalidate all TLBs and caches with a single write.

To invalidate TLB entries, ensure that your software issues the appropriate command for the translation context. To invalidate:

Note:

Commands to invalidate Secure TLB entries can only be issued through the Secure Command queue. For a system that implements two security states, Secure software must issue the appropriate command to the Secure Command queue for the first TLB invalidation. If your system does not use Secure software, you can permit Non-secure software to access SMMU_S_INIT by using either sec_override or the TCU_SCR register.

To invalidate both the TCU configuration cache and the TBU combined configuration cache and TLB, issue the CMD_CFGI_ALL command.

To force all previous commands to complete, issue CMD_SYNC.

To invalidate all configuration caches and TLB entries for all translation regimes and security states, ensure that Secure software:

  1. Sets SMMU_S_INIT.INV_ALL to 1. The SMMU sets SMMU_S_INIT.INV_ALL to 0 after the invalidation completes.
  2. Polls SMMU_S_INIT.INV_ALL to check it is set to 0 before continuing the SMMU configuration.

See the Arm® System Memory Management Unit Architecture Specification, SMMU architecture version 3.0 for more information about issuing commands to the Command queue.

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