3.11.1 TBU_CTRL

This register disables TBU features. Do not modify the bits in this register unless directed to do so by Arm.

Its characteristics are:

Usage constraints

There are no usage constraints.

Configurations

This register exists in all TBU configurations.

Attributes
Offset

0x08E00

Type

RW

Reset

0x00000000

Width

32

The following figure shows the bit assignments.

Figure 3-12 TBU_CTRL register bit assignments
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The following table shows the bit assignments.

Table 3-28 TBU_CTRL register bit assignments

Bits Name Function
[31:16] - Reserved.
[15:0] AUX[15:0] Leave each of these bits as 0.
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