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This is the TBU Error Generation register. Use this register to generate tag parity errors. You might want to generate errors in certain cases, such as when testing error-handling software.
The TBU_ERRGEN characteristics are:
When TBU_SCR.NS_RAS = 0, Non-secure accesses to this register are RAZ/WI.
This register exists in all TBU configurations.
The following figure shows the bit assignments.
The following table shows the bit assignments.
Table 3-33 TBU_ERRGEN register bit assignments
Main TLB tag parity error.
Main TLB data parity error.
Note:Tag parity errors mask data parity errors. When testing data parity error functionality, ensure that software does not set this bit and the TMTLB bit at the same time.