4.3 Distributor registers (GICA) for message-based SPIs summary

The functions for the GIC-600 message-based SPIs are controlled through the Distributor registers identified with the prefix GICA.

The following table lists the message-based SPI registers. All registers are 32 bits wide.

Table 4-20 Distributor registers (GICA) for message-based SPIs summary

Offset Name Type Width Reset Descriptiona Architecture defined?
0x0000-0x003C - - - - Reserved -
0x0040 GICA_SETSPI_NSR WO 32 - Aliased Non-secure SPI Set Register Yes
0x0044 - - - - Reserved -
0x0048 GICA_CLRSPI_NSR WO 32 - Aliased Non-secure SPI Clear Register Yes
0x004C - - - - Reserved -
0x0050 GICA_SETSPI_SRb WO 32 - Aliased Secure SPI Set Registerc Yes
0x0054 - - - - Reserved -
0x0058 GICA_CLRSPI_SRb WO 32 - Aliased Secure SPI Clear Registerc Yes
0x005C-0xFFFC - - - - Reserved -
a For the description of the registers that are not specific to the GIC-600, see the Arm® Generic Interrupt Controller Architecture Specification, GIC architecture version 3.0 and version 4.0.
b The existence of this register depends on the configuration of the GIC-600. If Security support is not included, this register does not exist.
c This register is only accessible from a Secure access.
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