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The GIC-600 uses multiple RAMs to store a range of states for all types of interrupt.
In typical operation, the RAMs are transparent to software.
A RAM is protected from errors using an ECC with Single Error Correction and Double Error Detection (SECDED). If single or double errors are detected, they are reported in the software visible error records, see 3.16 Reliability, Accessibility, and Serviceability for more information.
For all ECC schemes that are used in the GIC-600, the correction code is 0 when all data in the RAM is 0.