4.4.3 Power Management Control Register, GICR_WAKER

This register controls whether the GIC-600 can be powered down.

The GICR_WAKER characteristics are:

Usage constraintsThere are no usage constraints.
ConfigurationsAvailable in all GIC-600 configurations.
AttributesSee 4.4 Redistributor registers for control and physical LPIs summary.

The following figure shows the bit assignments.

Figure 4-19 GICR_WAKER bit assignments
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The following table shows the bit assignments.

Table 4-24 GICR_WAKER bit assignments

Bits Name Function
[31] Quiescent

Indicates that the GIC-600 is idle and can be powered down if necessary.

[30:3] -

Reserved, RAZ.

[2] ChildrenAsleep

Indicates that the bus between the CPU interface and this Redistributor is quiescent.

[1] ProcessorSleep

Indicates:

0 = This Redistributor never asserts wake_request.

1 = This Redistributor must assert a wake_request if there is a pending interrupt targeted at the connected core. See 3.6.2 Processor core power management.

[0] Sleep

Indicates the sleep state:

0 = Normal operation.

1 = The GIC-600 ensures that all the caches are consistent with external memory and that it is safe to power down. See 3.6.3 Other power management.

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