2.2.4 Redistributor PPI signals

GIC-600 supports 8, 12, or 16 PPIs, and synchronized output return wires, for each core. The number of PPIs and return wires must be the same for all cores sharing a Redistributor.

Level-sensitive PPI signals are active-LOW by default, as with previous Arm GIC implementations. However, individual PPI signals can be inverted and synchronized using parameters GIC600_<config_name>_PPI<ppi_id>_<cpu_number>_<ppi_number>_<INV/SYNC>.

Every wire has a corresponding wire from after the synchronizer or capture flop. These can be used to create pulse extenders for edge-triggered interrupts that cross clock domains.

Note:

If you plan to use edge-triggered PPIs and the Q-Channel to clock gate the Redistributor hierarchically, you must use pulse extenders to ensure that interrupts are not missed while the clock is restarted.

For information about the purpose of each PPI used by the core in your system, refer to the Technical Reference Manual for the core.

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