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The ITS generates or processes several signals, such as an ID tie-off, and the ITS page offset.
Table 2-11 ITS miscellaneous signals
Modifies the address map to ensure only writes to the correct location trigger MSI requests. Only present when the bypass switch is configured.
Specifies the 64K page address that includes the GITS_TRANSLATER register address, and is matched against axaddr[ADDR_WIDTH-1:16].
|its_id||Input||This is an ID tie-off. It must be tied to the ic<x>dtdest value used to read the ITS on the AXI4-Stream interface. This ID value feeds into the GITS_CFGID register and is used to check that the GIC system is correctly interconnected. If top-level stitching is used, which creates a hierarchical level from the other components, this signal is not visible.|
|its_transr_page_offset||Input||This tie-off signal is used to set the page address of the GITS_TRANSLATER register. Only present in monolithic configurations.|