4.2.8 Chip Registers, GICD_CHIPR<n>

Each register controls the configuration of the chip in a multichip system. This register exists on each chip in a multichip configuration and is identified by the chip number.

The GICD_CHIPR<n> characteristics are:

Usage constraintsThere are no usage constraints.
ConfigurationsAvailable in all GIC-600 configurations except in a single chip system.
AttributesSee 4.2 Distributor registers (GICD/GICDA) summary.

The following figure shows the bit assignments.

Figure 4-8 GICD_CHIPR<n> bit assignments
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The following table shows the bit assignments.

Table 4-11 GICD_CHIPR<n> bit assignments

Bits Name Function
[63:48] -


[47:16] ADDR

Controls the address bits[47:16]. Bits[15:0] of the address are zero. The value is driven by icdrtdest to route messages to the remote chip.

This bitfield is software RW.


Controls the minimum number of SPIs in a group (block). The permitted values are 0-31.

This bitfield is software RW.


Controls the number of SPI blocks. The permitted values are 0-31.

This bitfield is software RW.

[4:2] - Reserved.
[1] PUP

This bit is RO and returns the power update status:

0 = Power update complete.

1 = Power update in progress.

[0] SocketState

This bit is RW and controls the state of the chip:

0 = Chip is offline.

1 = Chip is online.

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