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Arm® CoreLink™ GIC-600 Generic Interrupt Controller Technical Reference ManualRevision r1p4
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4.6.3 Function Control Register, GITS_FCTLR

This register controls the scrubbing of all RAMs in the local GITS. The register is not distributed and only acts on the local chip.

The GITS_FCTLR characteristics are:

Usage constraintsThere are no usage constraints.
ConfigurationsAvailable in all GIC-600 configurations that have one or more ITS blocks.
AttributesSee 4.6 ITS control register summary.

The following figure shows the bit assignments.

Figure 4-29 GITS_FCTLR bit assignments
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The following table shows the bit assignments.

Table 4-38 GITS_FCTLR bit assignments

Bits Name Function
[31] DCC

Disable Cache Conversion:

0 = Use SMMU attribute for AMBA mapping.

1 = Use Direct attribute for AMBA mapping.
[30] PWE

Powerdown While Enabled:

0 = Requests GITS_CTLR.Quiescent to indicate ITS is quiescent and can be powered down.

1 = Do not request GITS_CTLR.Quiescent to indicate ITS is quiescent.
[29:19] - Reserved, RAZ/WI.
[18] IEC

Invalidate Event Cache (Write Only):

1 = Invalidate event cache.

0 = No effect.
[17] IDC

Invalidate Device Cache (Write Only):

1 = Invalidate Device cache.

0 = No effect.
[16] ICC

Invalidate Collection cache (Write Only):

1 = Invalidate Collection cache.

0 = No effect.
[15:12] - Reserved, RAZ/WI.
[11] DMA Enable translation memory reads via the Distributor to meet PCIe dependency requirements.

1 = Enable translation memory reads via Distributor.

0 = All memory accesses via ACE-Lite Master interface.
[10] - Reserved, RAZ/WI.
[9] QD

Q Deny:

1 = Always deny Q-Channel requests.

0 = Do not deny Q-Channel requests.
[8] AEE

Access Error Enable:

1 = Enable reporting of slave access errors.

0 = Do not enable reporting of slave access errors.
[7:4] CGO

One bit per clock gate:

CGO[0] = CCS, Translation logic.

CGO[1] = Command.

CGO[2] = Debug.

CGO[3] = Map Fetch.

Note:

CGO must be set if clock gates are not implemented.
[3] CEE

Command error enable:

0 = Do not enable reporting of command errors.

1 = Enable reporting of command errors.
[2] UEE

Unmapped error enable:

0 = Do not enable reporting of unmapped interrupt errors.

1 = Enable reporting of unmapped interrupt errors.
[1] LTE

Latency tracking enable:

0 = Disable latency tracking of interrupts.

1 = Enable latency tracking of interrupts.
[0] SIP

Scrub in progress:

0 = No scrub in progress.

1 = Scrub in progress.

This bit is read and written by software. When a scrub is complete, the GIC clears the bit to 0.
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