Non-ConfidentialPDF file icon PDF version100336_0104_00_en
Arm® CoreLink™ GIC-600 Generic Interrupt Controller Technical Reference ManualRevision r1p4
Home > Programmer's model > GICT register summary > Error Group Status Register, GICT_ERRGSR

4.8.7 Error Group Status Register, GICT_ERRGSR

This register shows the status of the GIC-600 ARMv8.2 RAS architecture-compliant error records for correctable and uncorrectable RAM ECC errors, ITS command and translation errors, and uncorrectable software errors.

The GICT_ERRGSR characteristics are:

Usage constraintsNone.
ConfigurationsAvailable in all GIC-600 configurations.
AttributesSee 4.8 GICT register summary.

The following figure shows the bit assignments.

Figure 4-40 GICT_ERRGSR bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


The following table shows the bit assignments.

Table 4-53 GICT_ERRGSR bit assignments

Bits Name Function
[n] Status

Indicates the status of error record n, where n is 0-13+ depending on the configuration:

0 = The error record is not reporting any errors.

1 = The error record is reporting one or more errors.
Non-ConfidentialPDF file icon PDF version100336_0104_00_en
Copyright © 2016–2018 Arm Limited or its affiliates. All rights reserved. 
Home > Programmer's model > GICT register summary > Error Group Status Register, GICT_ERRGSR