11.8.7 Event Control 1 Register

The TRCEVENTCTL1R controls how the events selected by TRCEVENTCTL0R behave.

Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes

Register number: 9

Base offset 0x024

Name: TRCEVENTCTL1R

Type: RW

Reset: -

The following figure shows the TRCEVENTCTL1R bit assignments.

Figure 11-11 TRCEVENTCTL1R bit assignments
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The following table shows the TRCEVENTCTL1R bit assignments.

Table 11-23 TRCEVENTCTL1R bit assignments

Bits Name Function
[31:13] - Reserved. RAZ/WI.
[12] LPOVERRIDE

Low-power state behavior override:

0b0Low-power state behavior unaffected.
0b1Low-power state behavior overridden. The resources and Event trace generation are unaffected by entry to a low-power state.
[11] ATB

ATB trigger enable:

0b0ATB trigger disabled.
0b1ATB trigger enabled.
[10:5] - Reserved. RAZ/WI.
[4] DATAEN

Enables generation of an event element in the data trace stream when the selected event occurs:

0b0Event does not cause an event element.
0b1Event causes an event element.
[3:0] EN

One bit per event, to enable generation of an event element in the instruction trace stream when the selected event occurs:

0b0Event does not cause an event element.
0b1Event causes an event element.
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