1.2.1 ARM® architecture

The Cortex®‑R8 processor implements the ARMv7‑R architecture and ARMv7 debug architecture. The ARMv7‑R architecture provides 32-bit ARM® and 16-bit and 32-bit Thumb® instruction sets, including a range of Single Instruction, Multiple Data (SIMD) Digital Signal Processing (DSP) instructions that operate on 16-bit or 8-bit data values in 32-bit registers.

The optional Floating Point Unit (FPU) implements the VFPv3-D16 architecture that includes the VFPv3 instruction set. See ARM® Architecture Reference Manual, ARMv7‑A and ARMv7‑R edition.

Non-ConfidentialPDF file icon PDF versionARM 100400_0001_03_en
Copyright © 2015–2017 ARM Limited or its affiliates. All rights reserved.