11.8.35 ID Register 5

The TRCIDR5 indicates the resources available in the Cortex®‑R8 processor ETM.

Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes

Register number: 125

Base offset 0x1F4

Name: TRCIDR5

Type: RO

Reset: 0x28C70840

The following figure shows the TRCIDR5 bit assignments.

Figure 11-44 TRCIDR5 bit assignments
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The following table shows the TRCIDR5 bit assignments.

Table 11-56 TRCIDR5 bit assignments

Bits Name Function
[31] REDFUNCNTR

Reduced Function Counter implemented:

0b0Reduced Function Counter not implemented
[30:28] NUMCNTR

Number of counters implemented:

0b010Two counters implemented
[27:25] NUMSEQSTATE

Number of sequencer states implemented:

0b100Four sequencer states implemented
[24] - Reserved. RAZ/WI
[23] LPOVERRIDE

Low-power state override support:

0b1Low-power state override support implemented
[22] ATBTRIG

ATB trigger support:

0b1ATB trigger support implemented
[21:16] TRACEIDSIZE

Number of bits of trace ID:

0x07Seven-bit trace ID implemented
[15:12] - Reserved. RAZ/WI.
[11:9] NUMEXTINSEL

Number of external input selectors implemented:

0b100Four external input selectors implemented
[8:0] NUMEXTIN

Number of external inputs implemented:

0x4064 external inputs implemented
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