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When the Cortex®‑R8 processor enters a low-power state, the ETM resources become inactive after a delay which allows the last instruction executed to trigger a comparator, update the counter or sequencer, and then cause an event packet to be inserted in the trace stream. This event packet is presented on the trace bus before the ETM itself enters a low-power state. If an event packet is generated for a different reason, it is not guaranteed to be output before the ETM enters a low-power state, but is traced when the Cortex‑R8 processor leaves the low-power state, if the ETM logic is not reset before this can occur.
This low-power behavior can be disabled, in which case the ETM resources remain active.