5.4 FPU register summary

Summary of the FPU system registers. All FPU system registers are 32-bit wide. Reserved register addresses are RAZ/WI.

Table 5-2 FPU system registers

Name Type Reset Description
FPSID RO 0x41023180 See 5.5.1 Floating-Point System ID Register
FPSCR RW 0x00000000 See 5.5.2 Floating-Point Status and Control Register
MVFR1 RO 0x01000011 See the ARM® Architecture Reference Manual ARMv7‑A and ARMv7‑R edition
MVFR0 RO

0x10110221a

0x10110021b

See the ARM® Architecture Reference Manual ARMv7‑A and ARMv7‑R edition
FPEXC RW 0x00000000 See 5.5.3 Floating-Point Exception Register
This section contains the following subsections:
a For full FPU implementation, with double precision.
b For single-precision FPU implementation.
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