11.8.5 Auxiliary Control Register

The TRCAUXCTLR provides additional controls for the Cortex®‑R8 processor ETM.

Usage constraints
There are no usage constraints.
Available in all configurations.

Register number: 6

Base offset 0x018


Type: RW

Reset: 0x00000000

The following figure shows the TRCAUXCTLR bit assignments.

Figure 11-9 TRCAUXCTLR bit assignments
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The following table shows the TRCAUXCTLR bit assignments.

Table 11-21 TRCAUXCTLR bit assignments

Bits Name Function
[31:2] - Reserved. RAZ/WI.
[1] QFLUSH Always respond immediately to TRCITDATBOUTR.AFREADY. No interaction with FIFO draining, even in WFI state.
[0] SYNCOF Force an overflow if synchronization is not completed when second synchronization is due.
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