11.8.56 Device Architecture Register

The TRCDEVARCH identifies the Cortex®‑R8 processor ETM as an ETMv4 component.

Usage constraints
There are no usage constraints.
Available in all configurations.

Register number: 1007

Base offset 0xFBC


Type: RO

Reset: 0x47704A17

The following figure shows the TRCDEVARCH bit assignments.

Figure 11-66 TRCDEVARCH bit assignments
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The following table shows the TRCDEVARCH bit assignments.

Table 11-79 TRCDEVARCH bit assignments

Bits Name Function

Defines the architect of the component:


Indicates the presence of this register:

0b1Register is present
[19:16] REVISION

Architecture revision:

0b0000Architecture revision 0
[15:0] ARCHID

Architecture ID:

0x4A13ETMv4 component
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