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Out-of-order execution is not always possible. Some instructions are serializing. Serializing instructions force the Cortex®‑R8 processor to complete all modifications to flags and general-purpose registers by previous instructions before the next instruction is executed.
The following exception entry instructions are serializing:
The following instructions that modify mode or program control are serializing:
CPSRwhen they modify control or mode bits.
MOVS pc, r14).
The following instructions are serializing:
MCRto CP14 or CP15 except
MRCp14 for debug registers.
The following instruction, that modifies the SPSR, is serializing: