5.5.1 Floating-Point System ID Register

The FPSID Register provides information about the VFP implementation.

Usage constraints
Only accessible in privileged modes.
Available in all FPU configurations.
See the FPU system registers summary, 5.4 FPU register summary.

The following figure shows the FPSID Register bit assignments.

Figure 5-1 FPSID Register bit assignments
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The following table shows the FPSID Register bit assignments.

Table 5-4 FPSID Register bit assignments

Bits Name Function
[31:24] Implementer Denotes ARM®
[23] SW Hardware implementation with no software emulation
[22:16] Subarchitecture The v2 VFP sub-architecture
[15:8] Part number VFPv3
[7:4] Variant Cortex®‑R8
[3:0] Revision Revision 0

You can access the FPSID Register with the following VMRS instruction:

VMRS <Rd>, FPSID ; Read Floating-Point System ID Register
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