2.4.2 Power domains

The Cortex®‑R8 processor supports several power domains, including one for each processor, and one for each of the individual processor Cache RAM arrays.

The Cortex‑R8 processor can support the following power domains:

Note:

If an ETM is included for each core, each ETM has its own power domain. In addition, the local CoreSight™ logic, that is, CTI0 and CTI1, CTI2, CTI3, CTM, APB multiplexer, and ROM table, are also in a separate power domain.

Each power domain has its own clock and reset signal, and its own clock off signal. When a power domain is powered-off, some clamp values might be driven HIGH. See the ARM® Cortex®‑R8 MPCore Processor Configuration and Sign-off Guide for more information.

Non-ConfidentialPDF file icon PDF versionARM 100400_0001_03_en
Copyright © 2015–2017 ARM Limited or its affiliates. All rights reserved.