11.8.22 Sequencer State Register

The TRCSEQSTR holds the value of the current state of the sequencer.

Usage constraints
  • Can only be written when the Cortex®‑R8 processor ETM is disabled.
  • Must be programmed with an initial value when programming the sequencer.
Configurations
Available in all configurations.
Attributes

Register number: 71

Base offset 0x11C

Name: TRCSEQSTR

Type: RW

Reset: -

The following figure shows the TRCSEQSTR bit assignments.

Figure 11-26 TRCSEQSTR bit assignments
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The following table shows the TRCSEQSTR bit assignments.

Table 11-38 TRCSEQSTR bit assignments

Bits Name Function
[31:2] - Reserved. RAZ/WI
[1:0] STATE

Current sequencer state:

0b00State 0
0b01State 1
0b10State 2
0b11State 3
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