4.2.3 c5 registers

Summary of the 32-bit wide CP15 system control registers when CRn is c5.

Table 4-4 c5 register summary

Op1 CRm Op2 Name Reset Description
0 c0 0 DFSR - Data Fault Status Registera
1 IFSR - Instruction Fault Status Registera
a  For information, see the ARM® Architecture Reference Manual ARMv7‑A and ARMv7‑R edition.
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