10.3 Embedded Trace Macrocell

The optional ETM is compliant with the ETMv4 architecture. It provides full address and data trace, and enables real-time code tracing of the Cortex®‑R8 processor in an embedded system.

A single core Cortex‑R8 processor has a single ETM. In a multiprocessor configuration, each core can either share a single ETM, or each core can have its own ETM.

The ETM is enabled through the APB debug interface. You can disable the ETM, and power it off for power saving.

See Chapter 11 Embedded Trace Macrocell for more information.

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