7.2.5 RAM configuration

RAM configuration for ECC and parity.

The following table shows the RAM configuration with or without ECC.

Table 7-3 RAM configuration with or without ECC

RAM Storage for a RAM set without ECC Storage for a RAM set with ECC
Data tag RAM 4 × 29 bits 4 × (29 + 7) bits
Data data RAM 8 × 32 bits 8 × (32 + 7) bits
Instruction tag RAM 4 × 23 bits 4 × (23 + 7) bits
Instruction data RAM 4 × 64 bits 4 × (64 + 8) bits
SCU tag RAMs 4 × 23 bits 4 × (23 + 7) bits
Data TCM 2 × 32 bits 2 × (32 + 7) bits
Instruction TCM 4 × 64 bits 4 × (64 + 8) bits

The following table shows the RAM configuration with or without parity.

Table 7-4 RAM configuration with or without parity

RAM Storage for a set without parity Storage for a set with parity
BTAC 2 × 32 + 2 × 28 bits 2 × (32 + 4) + 2 × (28 + 4) bits
PRED 4 × 4 bits 4 × (4 + 4) bits
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