4.3.15 Power Control Register

The PCR enables you to set dynamic clock gating.

Usage constraints
There are no usage constraints.
Available in all configurations.
See the c15 register summary, 4.2.8 c15 registers.

The following figure shows the PCR bit assignments.

Figure 4-17 PCR bit assignments
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The following table shows the PCR bit assignments.

Table 4-35 PCR bit assignments

Bits Name Function
[31:1] - Reserved
[0] Enable dynamic clock gating Disabled at reset

To access the Power Control Register, read or write the CP15 register with:

MRC p15, 0, <Rd>, c15, c0, 0 ; Read Power Control Register
MCR p15, 0, <Rd>, c15, c0, 0 ; Write Power Control Register
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