7.7 Static split/lock

Static split/lock enables you to choose between performance mode, that is, a multiprocessing configuration with two processors, and lock-step mode, that is, a lock-step configuration with dualredundant logic.

Because this is a static split/lock, you can only switch modes during reset. The global input SAFEMODE enables you to choose the mode:

The SAFEMODE input must be kept stable during normal operation and can only be changed at reset.

The following figure shows how split/lock is implemented.

In static split/lock, core 1 is present with both noram and ram modules. When the Cortex®‑R8 processor is operating in lock-step mode, the ram logic is clamped.

Only the core 0 slave port of the SCU is duplicated. The interface with core 1 is not required because, when in lock-step mode, the core 1 noram is used as a redundancy of core 0.


You can implement static split/lock in a Cortex‑R8 processor that has only two cores.
Figure 7-2 Static split/lock
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