11.8.29 Implementation Specific Register 0

The TRCIMSPEC0 shows the presence of any implementation-specific features, and enables any features that are provided.

Usage constraints
There are no usage constraints.
Available in all configurations.

Register number: 112

Base offset 0x1C0


Type: RW

Reset: 0x00000000

The following figure shows the TRCIMSPEC0 bit assignments.

Figure 11-38 TRCIMSPEC0 bit assignments
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The following table shows the TRCIMSPEC0 bit assignments.

Table 11-50 TRCIMSPEC0 bit assignments

Bits Name Function
[31:4] - Reserved. RAZ/WI.
[3:0] SUPPORT Set to 0x0. No implementation-specific extensions are supported.
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