11.8.18 ViewData Include/Exclude Single Address Comparator Register

The TRCVDSACCTLR defines the single address comparators that control the ViewData Include/Exclude control.

Usage constraints
Can only be written when the Cortex®‑R8 processor ETM is disabled.
Configurations
Available in all configurations.
Attributes

Register number: 41

Base offset 0x0A4

Name: TRCVDSACCTLR

Type: RW

Reset: -

The following figure shows the TRCVDSACCTLR bit assignments.

Figure 11-22 TRCVDSACCTLR bit assignments
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The following table shows the TRCVDSACCTLR bit assignments.

Table 11-34 TRCVDSACCTLR bit assignments

Bits Name Function
[31:25] - Reserved. RAZ/WI.
[24:16] EXCLUDE Defines the single address comparators for ViewData exclude control. One bit is provided for each implemented address comparator.
[15:8] - Reserved. RAZ/WI.
[7:0] INCLUDE

Defines the single address comparators for ViewData include control.

One bit is provided for each implemented address comparator.

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