11.8.3 Status Register

The TRCSTATR indicates the Cortex®‑R8 processor ETM status.

Usage constraints
There are no usage constraints.
Available in all configurations.

Register number: 3

Base offset 0x00C


Type: RO

Reset: -

The following figure shows the TRCSTATR bit assignments.

Figure 11-7 TRCSTATR bit assignments
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The following table shows the TRCSTATR bit assignments.

Table 11-19 TRCSTATR bit assignments

Bits Name Function
[31:2] - Reserved. RAZ/WI.

Indicates whether the Cortex‑R8 processor ETM registers are stable and can be read:

0b0The programmers model is not stable.
0b1The programmers model is stable.
[0] IDLE

Idle status:

0b0The Cortex‑R8 processor ETM is not idle.
0b1The Cortex‑R8 processor ETM is idle.
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