A.13.1 L1 and DTCM Cortex®‑R8 processor MBIST interface width without ECC

Details of the L1 and DTCM signals for designs without ECC.

Note:

All MBIST signals except MBISTREQx are internal pins of PLOVER.v corresponding to plover_mbist_intf<x>.v modules. The MBIST controller must connect directly to the plover_mbist_intf<x>.v module.

Table A-43 L1 and DTCM Cortex®‑R8 processor MBIST interface width without ECC

Name Type Source/destination Description
MBISTREQ1 Input MBIST controller BIST mode request signal, one per core
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