7.2.2 RAM protection summary table

The table shows how the different types of RAM are protected.

Table 7-1 RAM protection summary

RAM type Protection Parity/ECC chunk Correctable error Fatal error Hard error support
Data tag RAM SEC-DED ECC

34 bits:

  • 25 bits for tag and status.
  • 9 bits for index.
Error seen as a single bit error Error seen as a multiple bit error Up to three hard errors, including the SCU hard errors
Data data RAM SEC-DED ECC 32-bit data word Error seen as a single bit error Error seen as a multiple bit error on dirty lines
Instruction tag RAM SEC-DED ECC

28 bits:

  • 23 bits for tag.
  • 5 bits for index.
Any error, single or double, on the tag or valid stored in the RAM None Up to three hard errors
Instruction data RAM SEC-DED ECCa 64-bit data word Any error on the data stored in the RAM None
BTAC Parityb 8-bit - - None
PRED Parityb 1-bit (copy) - - None
SCU tag RAM SEC-DED ECC

28 bits:

  • 23 bits for tag.
  • 5 bits for index.
Any error None Up to two hard errors
Data TCM SEC-DED ECC 32-bit data word Error seen as a single bit error Error seen as a multiple bit error Up to one hard error
Instruction TCM SEC-DED ECC 64-bit word Error seen as a single bit error Error seen as a multiple bit error Up to one hard error
a The SEC-DED ECC is used as a Double Error Correction because the lines are clean.
b BTAC and PRED do not prevent the system from operating correctly and only impact the performance, even if hard errors occur. Parity provides a compromise between the area overhead in the RAMs and the ability to detect errors.
Non-ConfidentialPDF file icon PDF versionARM 100400_0001_03_en
Copyright © 2015–2017 ARM Limited or its affiliates. All rights reserved.