11.8.27 Counter Value Registers 0-1

The TRCCNTVRn contain the current counter value.

Usage constraints
  • Can only be written when the Cortex®‑R8 processor ETM is disabled.
  • Must be programmed with an initial value when programming the counter.
Available in all configurations.

Register number: 88-89

Base offset 0x160-0x164


Type: RW

Reset: -

The following figure shows the TRCCNTVRn bit assignments.

Figure 11-31 TRCCNTVRn bit assignments
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The following table shows the TRCCNTVRn bit assignments.

Table 11-43 TRCCNTVRn bit assignments

Bits Value Function
[31:16] - Reserved. RAZ/WI
[15:0] VALUE Contains the current counter value
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