11.8.4 Trace Configuration Register

The TRCCONFIGR sets the basic tracing options for the trace unit.

Usage constraints
There are no usage constraints.
Available in all configurations.

Register number: 4

Base offset 0x010


Type: RW

Reset: -

The following figure shows the TRCCONFIGR bit assignments.

Figure 11-8 TRCCONFIGR bit assignments
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The following table shows the TRCCONFIGR bit assignments.

Table 11-20 TRCCONFIGR bit assignments

Bits Name Function
[31:18] - Reserved. RAZ/WI.
[17] DV

Data value tracing:

0b0Data value tracing disabled.
0b1Data value tracing enabled.
[16] DA

Data address tracing:

0b0Data address tracing disabled.
0b1Data address tracing enabled.
[15:13] - Reserved. RAZ/WI.
[12] RS

Return stack enable:

0b0Return stack disabled.
0b1Return stack enabled.
[11] TS

Global timestamp tracing:

0b0Global timestamp tracing disabled.
0b1Global timestamp tracing enabled.

For more global timestamping options, see 11.8.9 Global Timestamp Control Register.

[10:8] COND

Conditional instruction tracing:

0b000Conditional instruction tracing disabled.
0b001Conditional load instructions are traced.
0b010Conditional store instructions are traced.
0b011Conditional load and store instructions are traced.
0b111All conditional instructions are traced.

All other values are Reserved.

[7] - Reserved. RAZ/WI.
[6] CID

Context ID tracing:

0b0Context ID tracing disabled.
0b1Context ID tracing enabled.
[5] - Reserved. RAZ/WI.
[4] CCI

Cycle counting in instruction trace:

0b0Cycle counting in instruction trace disabled.
0b1Cycle counting in instruction trace.

For more cycle counting options, see 11.8.11 Cycle Count Control Register.

[3] BB

Branch broadcast mode:

0b0Branch broadcast mode disabled.
0b1Branch broadcast mode trace.

For more branch broadcast mode options, see 11.8.12 Branch Broadcast Control Register.

[2:1] INSTP0

Determines the instructions which are P0 instructions:

0b00Only branches are P0 instructions.
0b01Load instructions and branches are P0 instructions.
0b10Store instructions and branches are P0 instructions.
0b11Load and store instructions and branches are P0 instructions.
[0] - Reserved. RAO.
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