9.4.1 Interrupt controller clock frequency

The interrupt controller runs on PERIPHCLK. The clock period is configured, during integration, as an integer division of the Cortex®‑R8 processor clock (CLK) period.

This division, N, must be greater than or equal to two. As a consequence, the minimum pulse width of signals driving external interrupt lines is N CLK cycles.

The timers and watchdogs use the same clock as the interrupt controller.

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