Processor registers used in ECC.
- Auxiliary Control
- Bits[10:9] of this register are used to enable ECC
- ECC Error Registers (DEER0-2/IEER0-2
- These registers provide information on ECC errors.
- Performance counters
- The performance counters can be configured to monitor
several ECC-related metrics.
- Cache and TCM Debug Operation
- The processor contains registers that provide direct
access to the caches. These registers enable the RAM analysis on
error and the auto-checking of the ECC mechanisms by software. On
the instruction side, these registers enable direct access to the
instruction cache and to the instruction data. BTAC and PRED cannot
be accessed in this way. On the data side, the tag RAM and the data
cache RAM can be accessed in this way.