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The SCU Error Bank First Entry Register shows the first SCU error bank entry.
Offset from PERIPHBASE[31:13]:
Reset value: -
The following figure shows the SCU Error Bank First Entry Register bit assignments.
The following table shows the SCU Error Bank First Entry Register bit assignments.
Table 9-12 SCU Error Bank First Entry Register bit assignments
|[31:28]||Ways for core3||Ways for core 3|
|[27:24]||Ways for core2||Ways for core 2.|
|[23:20]||Ways for core1||Ways for core 1.|
|[19:16]||Ways for core0||Ways for core 0.|
Error status. The values are: