A.15.5 ETM Miscellaneous signals

Details of the ETM miscellaneous signals.

Table A-55 ETM Miscellaneous signals

Signal name Type Source/destination Description
PROCSEL[2:0] Output Trace multiplexor, if present

Where an ETM is shared between multiple processors, this signal controls the multiplexor.

The value is driven from bits[2:0] of the 11.8.2 Processor Select Control Register.

NUMPROC[2:0] Input Tie off

Where an ETM is shared between multiple cores, this signal specifies the number of cores the ETM can trace. It must be tied to the number of cores sharing the ETM minus 1.

These signals determine the value of bits[30:28] in the 11.8.33 ID Register 3.

NIDEN[CN:0] Input System

Non-invasive debug enable.

When HIGH (0b1), indicates that non-invasive debug is enabled.

ETMACTIVEx Output Processor Trace is being output.
ETMEVENT[63:0] Input PMU and CTI External input resources.
ETMEXTOUT[3:0] Output CTI External outputs.
SYSSTALL Input Tie off System supports stalling of the core by the ETM.
ETMPWRUPREQx Output System power control Request to maintain power to ETM.
TSSIZE Input Tie off When HIGH (0b1), timestamp is 64 bits. When LOW (0b0), timestamp is 48 bits.
TSVALUE[63:0] Input CoreSight™ system Timestamp value.
CLUSTERID[3:0] Input System Value read in the Cluster ID field, bits[11:8], of the Cortex®‑R8 Multiprocessor Affinity Register (MPIDR).
CPUID Input System Value read in the CPU ID field, bits[1:0], of the MPIDR in the connected core.
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