A.12 Test interface

Details of the test interface signals.

Table A-42 Test interface signals

Name Type Source/destination Description
DFTSE Input External test interface Scan shift enable
DFTRAMHOLD Input Holds RAM content during scan shift
DFTRAMCLKENABLE Input Forces RAM clock for DFT purposes even when cores are in WFI mode
DFTTESTMODE Input Disable/bypass logic for test purposes
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