11.8.19 ViewData Include/Exclude Address Range Comparator Register

The TRCVDARCCTLR defines the address range comparators that control the ViewData Include/Exclude control.

Usage constraints
Can only be written when the Cortex®‑R8 processor ETM is disabled.
Configurations
Available in all configurations.
Attributes

Register number: 42

Base offset 0x0A8

Name: TRCVDARCCTLR

Type: RW

Reset: -

The following figure shows the TRCVDARCCTLR bit assignments.

Figure 11-23 TRCVDARCCTLR bit assignments
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The following table shows the TRCVDARCCTLR bit assignments.

Table 11-35 TRCVDARCCTLR bit assignments

Bits Name Function
[31:20] - Reserved. RAZ/WI.
[19:16] EXCLUDE Defines the address range comparators for ViewData exclude control.One bit is provided for each implemented address range comparator.
[15:4] - Reserved. RAZ/WI.
[3:0] INCLUDE

Defines the address range comparators for ViewData include control.

One bit is provided for each implemented address range comparator.

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