11.7.1 Cortex®‑R8 processor ETM register summary

Summary of the ETM registers. The registers are listed in numerical order. Registers not listed here are not implemented.

Note:

  • Reading a non-implemented register address returns zero. Writing to a non-implemented register address has no effect.
  • The Reset value column shows the value of the register immediately after an ETM reset. For read-only registers, every read of the register returns this value.
  • Access type is described as follows:

    RW
    Read and write.
    RO
    Read only.
    WO
    Write only.

All ETM registers are 32 bits wide.

Table 11-6 Cortex®‑R8 processor ETM register summary

Register number Base offset Name Type Reset value Description
1 0x004 TRCPRGCTLR RW 0x00000000 11.8.1 Programming Control Register
2 0x008 TRCPROCSELR RW 0x00000000 11.8.2 Processor Select Control Register
3 0x00C TRCSTATR RO - 11.8.3 Status Register
4 0x010 TRCCONFIGR RW - 11.8.4 Trace Configuration Register
6 0x018 TRCAUXCTLR RW 0x00000000 11.8.5 Auxiliary Control Register
8 0x020 TRCEVENTCTL0R RW - 11.8.6 Event Control 0 Register
9 0x024 TRCEVENTCTL1R RW - 11.8.7 Event Control 1 Register
11 0x02C TRCSTALLCTLR RW - 11.8.8 Stall Control Register
12 0x030 TRCTSCTLR RW - 11.8.9 Global Timestamp Control Register
13 0x034 TRCSYNCPR RW - 11.8.10 Synchronization Period Register
14 0x038 TRCCCCTLR RW - 11.8.11 Cycle Count Control Register
15 0x03C TRCBBCTLR RW - 11.8.12 Branch Broadcast Control Register
16 0x040 TRCTRACEIDR RW - 11.8.13 Trace ID Register
32 0x080 TRCVICTLR RW - 11.8.14 ViewInst Main Control Register
33 0x084 TRCVIIECTLR RW - 11.8.15 ViewInst Include/Exclude Control Register
34 0x088 TRCVISSCTLR RW - 11.8.16 ViewInst Start/Stop Control Register
40 0x0A0 TRCVDCTLR RW - 11.8.17 ViewData Main Control Register
41 0x0A4 TRCVDSACCTLR RW - 11.8.18 ViewData Include/Exclude Single Address Comparator Register
42 0x0A8 TRCVDARCCTLR RW - 11.8.19 ViewData Include/Exclude Address Range Comparator Register
64-66 0x100-0x108 TRCSEQEVRn RW - 11.8.20 Sequencer State Transition Control Registers 0-2
70 0x118 TRCSEQRSTEVR RW - 11.8.21 Sequencer Reset Control Register
71 0x11C TRCSEQSTR RW - 11.8.22 Sequencer State Register
72 0x120 TRCEXTINSELR RW - 11.8.23 External Input Select Register
80-81 0x140-0x144 TRCCNTRLDVRn RW - 11.8.24 Counter Reload Value Registers 0-1
84 0x150 TRCCNTCTLR0 RW - 11.8.25 Counter Control Register 0
85 0x154 TRCCNTCTLR1 RW - 11.8.26 Counter Control Register 1
88-89 0x160-0x164 TRCCNTVRn RW - 11.8.27 Counter Value Registers 0-1
96 0x180 TRCIDR8 RO 0x00000040 11.8.28 ID Register 8-13
97 0x184 TRCIDR9 RO 0x00000040
98 0x188 TRCIDR10 RO 0x00000040
99 0x18C TRCIDR11 RO 0x00000011
100 0x190 TRCIDR12 RO 0x00000020
101 0x194 TRCIDR13 RO 0x00000000
112 0x1C0 TRCIMSPEC0 RW 0x00000000 11.8.29 Implementation Specific Register 0
120 0x1E0 TRCIDR0 RO 0xXX001EFF 11.8.30 ID Register 0
121 0x1E4 TRCIDR1 RO 0x4100F400 11.8.31 ID Register 1
122 0x1E8 TRCIDR2 RO 0x00420084 11.8.32 ID Register 2
123 0x1EC TRCIDR3 RO 0xXX090004 11.8.33 ID Register 3
124 0x1F0 TRCIDR4 RO 0x01270124 11.8.34 ID Register 4
125 0x1F4 TRCIDR5 RO 0x28C70840 11.8.35 ID Register 5
130-140 0x208-0x240 TRCRSCTLRn RW - 11.8.36 Resource Selection Registers 2-16
160-161 0x280-0x284 TRCSSCCRn RW - 11.8.37 Single-Shot Comparator Control Registers 0-1
168-169 0x2A0-0x2A4 TRCSSCSRn RW - 11.8.38 Single-Shot Comparator Status Registers 0-1
192 0x300 TRCOSLAR WO - 11.8.39 OS Lock Access Register
193 0x304 TRCOSLSR RO - 11.8.40 OS Lock Status Register
196 0x310 TRCPDCR RW 0x00000000 11.8.41 Power Down Control Register
197 0x314 TRCPDSR RO 0x00000023 11.8.42 Power Down Status Register
256-271 0x400-0x43C TRCACVRn RW - 11.8.43 Address Comparator Value Registers 0-7
288-303 0x480-0x4BC TRCACATRn RW - 11.8.44 Address Comparator Access Type Registers 0-7
320-321 0x500-0x504 TRCDVCVRn RW - 11.8.45 Data Value Comparator Value Registers 0-1
352-359 0x580-0x59C TRCDVCMRn RW - 11.8.46 Data Value Comparator Mask Registers 0-1
384 0x600 TRCCIDCVR0 RW - 11.8.48 Context ID Comparator Value Register 0
416 0x680 TRCCIDCCTLR0 RW - 11.8.47 Context ID Comparator Control Register 0
951 0xEDC TRCITMISCOUTR RW - Integration Miscellaneous Outputs Register
952 0xEE0 TRCITMISCINR RO - Integration Miscellaneous Inputs Register
953 0xEE4 TRCITATBIDR RW - Integration ATB Identification Register
954 0xEE8 TRCIRDDATAR RW - Integration Data ATB Data Register
955 0xEEC TRCITIDATAR RW - Integration Instruction ATB Data Register
956 0xEF0 TRCITDATBINR RO - Integration Data ATB In Register
957 0xEF4 TRCITIATBINR RO - Integration Instruction ATB In Register
958 0xEF8 TRCITDATBOUTR RW - Integration Data ATB Out Register
959 0xEFC TRCITIATBOUTR RW - Integration Instruction ATB Out Register
960 0xF00 TRCITCTRL RW 0x00000000 11.8.49 Integration Mode Control Register
1000 0xFA0 TRCCLAIMSET RW 0x00000000 11.8.50 Claim Tag Set Register
1001 0xFA4 TRCCLAIMCLR RW 0x00000000 11.8.51 Claim Tag Clear Register
1002 0xFA8 TRCDEVAFF0 RO - 11.8.52 Device Affinity Register
1004 0xFB0 TRCLAR WO - 11.8.53 Software Lock Access Register
1005 0xFB4 TRCLSR RO - 11.8.54 Software Lock Status Register
1006 0xFB8 TRCAUTHSTATUS RO - 11.8.55 Authentication Status Register
1007 0xFBC TRCDEVARCH RO 0x47704A17 11.8.56 Device Architecture Register
1010 0xFC8 TRCDEVID RO 0x00000000 11.8.57 Device ID Register
1011 0xFCC TRCDEVTYPE RO 0x00000013 11.8.58 Device Type Register
1012-1019 0xFD0-0xFEC TRCPIDRn RO - 11.8.59 Peripheral Identification Registers
1020-1023 0xFF0-0xFFC TRCCIDRn RO - 11.8.60 Component Identification Registers
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