|Non-Confidential||PDF version||ARM 100400_0001_03_en|
|Home > System Control > Register descriptions > Multiprocessor Affinity Register|
The MPIDR provides an additional processor identification mechanism for scheduling purposes in a multiprocessor system.
The following figure shows the MPIDR bit assignments.
The following table shows the MPIDR bit assignments.
Table 4-20 MPIDR bit assignments
|||-||Indicates the register uses the new multiprocessor
format. This is always
|[11:8]||Cluster ID||Value read in CLUSTERID configuration inputs. It identifies a Cortex‑R8 processor in a system that has several Cortex‑R8 processors present.|
Indicates the core number in the multiprocessor configuration:
To access the MPIDR, read the CP15 register with:
MRC p15,0,<Rd>,c0,c0,5 ; read Multiprocessor ID register