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The LLP Filtering Start Address Register provides the filtering start address for the AXI low-latency peripheral port.
Offset from PERIPHBASE[31:13]:
Reset value: Defined by PFILTERSTART input.
The following figure shows the LLP Filtering Start Address Register bit assignments.
The following table shows the LLP Filtering Start Address Register bit assignments.
Table 9-9 LLP Filtering Start Address Register bit assignments
|[31:20]||Filtering start address||
Filtering start address for the peripheral port.
The default value is the value of PFILTERSTART sampled on exit from reset. The value on the input gives the upper address bits with 1MB granularity.