4.2.12 Cache maintenance operations

Summary of the cache maintenance operations.

Table 4-13 Cache maintenance operations

Name CRn Op1 CRm Op2 Reset Description
NOP c7 0 c0 4 - No operationa
ICIALLUIS c1 0 - Invalidate all instruction caches to PoU Inner Shareablea
BPIALLIS 6 - Invalidate entire branch predictor array Inner Shareablea
ICIALLU c5 0 - Invalidate entire instruction cachea
ICIMVAU 1 - Invalidate instruction cache by VA to PoUa
CP15ISB 4 - Instruction Synchronization Barrier operationa
BPIALL 6 - Invalidate entire branch predictor arraya
BPIMVA 7 - Invalidate MVA from branch predictorsa
DCIMVAC c6 1 - Invalidate data cache line by VA to PoCa
DCISW 2 - Invalidate data cache line by Set/Waya
DCCMVAC c10 1 - Clean data cache line to PoC by VAa
DCCSW 2 - Clean data cache line by Set/Waya
CP15DSB c10 4 - Data Synchronization Barrier operationa
CP15DMB 5 - Data Memory Barrier operationa
DCCMVAU c11 1 - Clean data or unified cache line by VA to PoUa
DCCIMVAC c14 1 - Clean and invalidate data cache line by VA to PoCa
DCCISW 2 - Clean and invalidate data cache line by Set/Waya
a For information, see the ARM® Architecture Reference Manual ARMv7‑A and ARMv7‑R edition.
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