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The Cortex®‑R8 processor includes up to four cores, a Snoop Control Unit (SCU), integrated timers, the ability to implement redundant processor logic, and numerous other advanced features.
The Cortex‑R8 processor includes the following features:
Up to four cores, with the following features:
A superscalar, variable-length, out-of-order pipeline.
A Harvard L1 memory system for each core with:
An ARMv7‑R architecture Memory Protection Unit (MPU) with 12, 16, 20 or 24 regions, each region with a minimum resolution of 256 bytes.
High-speed Advanced Microprocessor Bus Architecture (AMBA®) Advanced eXtensible Interfaces (AXI3):
A single 64-bit master interface.
Optional ETM/ATB interface with full instruction and data trace, with either:
One ETM, statically shared between each core.