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The Cortex®-A55 core implements the Arm®v8‑A architecture and some architecture extensions. It also supports various interconnect, interrupt, timer, debug, and trace architectures.
Table A1-2 Compliance with standards and specifications
|Architecture specification or standard||Version||Notes|
|Arm architecture extensions||
|Generic Interrupt Controller||GICv4||-|
|Debug||Armv8‑A||With support for the debug features added by the Armv8.2‑A extensions.|
|Embedded Trace Macrocell||ETMv4.2||-|
See Additional reading for a list of architectural references.