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The Arm®v8‑A architecture includes memory types that replace the Armv7 Device and Strongly-ordered memory types. These device memory types have the following three attributes:
The legal combinations are described in the following table:
Table A5-3 Armv8‑A Device Memory Types
|GRE||Yes||Similar to Normal non-cacheable, but does not permit speculative accesses.|
|nGRE||Yes||Transactions might be reordered within the L3 memory system, or in the system interconnect.|
|nGnRE||Yes||Corresponds to Device in Armv7.|
Corresponds to Strongly Ordered in Armv7.
Treated the same as nGnRE inside the Cortex-A55 core, but reported differently on the bus interface.
For more information, see the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.