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Detected errors are reported in the Error Record Primary Syndrome Register, ERXSTATUS/ERXSTATUS_EL1, and the Error Record Miscellaneous Register, ERXMISC0/ERXMISC0_EL1.
This includes errors that are successfully corrected, and errors that cannot be corrected. If multiple errors occur on the same clock cycle, then only one error is reported but the OF (overflow) bit is set.
There are two error records provided, which can be selected with the ERRSELR/ERRSELR_EL1 register. Record 0 is private to the core, and is updated on any error in the core RAMs including L1 caches, TLB, and L2 cache. Record 1 records any error in the L3 and snoop filter RAMs and is shared between all cores in the cluster.
If enabled in the ERXCTLR/ERXCTLR_EL1 register, all errors that are detected cause a fault handling interrupt. The fault handling interrupt is generated on the nFAULTIRQ pin for L3 and snoop filter errors, or on the nFAULTIRQ[n+1] pin for core n L1 and L2 errors.
Errors that cannot be corrected, and therefore might result in data corruption, also cause an abort or an interrupt signal to be asserted, alerting software to the error. The software can either attempt to recover or can restart the system. Some errors are deferred by poisoning the data. This does not cause an abort at the time of the error, but only when the error is consumed.
The fault and error interrupt pins are cleared by writing to the ERXSTATUS/ERXSTATUS_EL1 registers.
When a snoop hits on a line with an uncorrectable data error, the data is returned if required by the snoop, but the snoop response indicates that the data is poisoned. If a snoop hits on a tag that has an uncorrectable error, then it is treated as a snoop miss, because the error means that it is unknown if the cache line is valid or not.
The following accesses update the Error Record Primary Syndrome Register:
The following observations should be made about ERRXSTATUS and ERRXMISCn registers: